;/**
; *  init.s - Entry for bycore.
; *
; *  Copyright (C) 2008  ZhangHu
; *  All rights reserved.
; *  E-MAIL: anmnmnly@gmail.com
; *
; *  This program is free software: you can redistribute it and/or modify
; *  it under the terms of the GNU General Public License as published by
; *  the Free Software Foundation, either version 3 of the License, or
; *  (at your option) any later version.
; *
; *  This program is distributed in the hope that it will be useful,
; *  but WITHOUT ANY WARRANTY; without even the implied warranty of
; *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
; *  GNU General Public License for more details.
; *
; *  You should have received a copy of the GNU General Public License
; *  along with this program.  If not, see <http://www.gnu.org/licenses/>.
; */

  PRESERVE8
  GET initcfg.s

  IMPORT  TaskSwitch
  IMPORT  isrHandler
  IMPORT  init_target
  IMPORT  sysinit

  IMPORT	|Image$$RO$$Limit|      ;End of ROM code (=start of ROM data)
  IMPORT	|Image$$RW$$Base|       ;Base of RAM to initialise
  IMPORT	|Image$$ZI$$Base|       ;Base and limit of area
  IMPORT	|Image$$ZI$$Limit|      ;to zero initialize

  MACRO
$HandlerLabel HANDLER $HandleLabel
$HandlerLabel
  STMFD SP!,{R0-R3,R12,R14} ;store the work register to stack
  LDR   R0,=$HandleLabel    ;load the address of HandleXXX to r0
  STMFD SP!,{R0}	          ;store the ISR of HandleXXX to stack
  LDMFD SP!,{PC}	          ;jump to ISR
  MEND


  AREA  reset,CODE,READONLY
    ENTRY

  B Start
  B .               ;handlerUndef
  B TaskSwitch      ;SWI interrupt handler
  B .               ;handlerPAbort
  B .               ;handlerDAbort
  B .               ;handlerReserved
  B HandlerIRQ
  B .               ;HandlerFIQ
HandlerIRQ HANDLER isrHandler

;Start
Start
  BL init_target
  BL init_stacks

;Copy and paste RW data/zero initialized data
  LDR R0, =|Image$$RO$$Limit|     ;Get pointer to ROM data
  LDR R1, =|Image$$RW$$Base|      ;and RAM copy
  LDR R3, =|Image$$ZI$$Base|
  ;Zero init base => top of initialised data

  CMP R0, R1        ;Check that they are different
  BEQ %F1
0
  CMP     R1, R3;Copy init data
  LDRCC   R2, [R0], #4            ;--> LDRCC R2,[R0]+ADD R0,R0,#4
  STRCC   R2, [R1], #4            ;--> STRCC R2,[R1]+ADD R1,R1,#4
  BCC     %B0
1
  LDR R1, =|Image$$ZI$$Limit|     ;Top of zero init segment
  MOV R2, #0
2
  CMP R3, R1;Zero init
  STRCC R2, [R3], #4
  BCC %B2

;System mode and turn off all interrupts
  MRS R1,CPSR
  ORR R1,R1,#0xFF
  BIC R1,R1,#0x20
  MSR CPSR_cxsf,R1

  B	sysinit   ;the initialize works of target has finished, then enter OS


init_stacks

  MRS R0,CPSR
  BIC R0,R0,#MODEMASK
  ORR R1,R0,#UNDEFMODE|NOINT
  MSR CPSR_cxsf,R1              ;UndefMode
  LDR SP,=UndefStack

  ORR R1,R0,#ABORTMODE|NOINT
  MSR CPSR_cxsf,R1              ;AbortMode
  LDR SP,=AbortStack

  ORR R1,R0,#IRQMODE|NOINT
  MSR CPSR_cxsf,R1              ;IRQMode
  LDR SP,=IRQStack

  ORR R1,R0,#FIQMODE|NOINT
  MSR CPSR_cxsf,R1              ;FIQMode
  LDR SP,=FIQStack

  ORR R1,R0,#SYSMODE|NOINT
  MSR CPSR_cxsf,R1              ;SYSMode or USERMode
  LDR SP,=UserStack

  ORR R1,R0,#SVCMODE|NOINT
  MSR CPSR_cxsf,R1              ;SVCMode
  LDR SP,=SVCStack

  ;USER mode is not initialized
  MOV PC,LR         ;The LR register may be invalid for the mode changes

  AREA RamData, DATA, READWRITE
; MAP ISR_START_ADDR

  MAP	(ISR_START_ADDR+0x100)
StackAddr   FIELD	512 ;4096
UserStack   FIELD	256 ;1024
SVCStack    FIELD	0
UndefStack  FIELD	0
AbortStack  FIELD	256 ;1024
IRQStack    FIELD	0
FIQStack    FIELD	0

  END
